X
X
X

X
Swayam Central

Advanced Computer Architecture

By Prof. John Jose   |   IIT Guwahati
Applications and hand held devices are part and parcel of our day to day life. We need high end microprocessors to effectively operate these applications. Single processor supercomputers limit of chip manufacturing. But there is limit to the computational power that can be achieved have achieved unheard of speeds and have been pushing hardware technology to the physical in computer architectures with a single processor system. This course will provide an introduction to the advances made. INTENDED AUDIENCE: Anyone in CSE and related fields (like ECE, EEE, IT etc.) withan interest of exploring Computer Architecture PREREQUISITES: A basic understanding of Computer Organisation and Architecture or Microprocessors INDUSTRY SUPPORT: Intel, AMD, IBM, Nvidia etc.

SUMMARY

Course Status : Upcoming
Course Type : Elective
Duration : 8 weeks
Start Date : 29 Jul 2019
End Date : 20 Sep 2019
Exam Date : 29 Sep 2019
Category :
  • Computer Science and Engineering
  • Level : Postgraduate
    This is an AICTE approved FDP course

    COURSE LAYOUT

    Week 1: Instruction execution fundamentals, Von-Neumann architecture, concept of memory and addressing. Performance measurement of computer hardware-MIPS, IPC, CPI, benchmarks. Speed-up Law. Instruction set principles, classification of instructions, addressing modes, instruction set encoding, MIPS instruction set, RISC vs CISC architectures.
    Week 2: Concept of instruction pipelining, RISC instruction set, RISC 5 stage pipeline, pipeline hazards, operand forwarding, branch prediction techniques, basic MIPS pipeline 
    Week 3: MIPS pipeline for handling multi-cycle operations, Design issues with multi-cycle pipeline. Case Study: MIPS R4000 pipeline. Introduction to gem5 simulator 
    Week 4: Compiler techniques to exploit ILP, pipeline scheduling, loop unrolling, advanced branch prediction schemes, dynamic scheduling, Tomasulo’s approach, hardware base speculation, VLIW approach for multi-issue
    Week 5: Multithreading-fined grained and coarse grained, superscalar and super pipelining, hyperthreading. Vector architectures, organizations and performance tuning. GPU architecture and internal organization, Elementary concepts in CUDA programming
    Week 6: Introduction to memory hierarchy, locality of reference, cache memory fundamentals, cache performance parameters. Block level issues -mapping, identification, cache replacement techniques, write strategy, types of misses-compulsory, capacity, conflict misses. 
    Week 7: Basic cache optimizations by adjusting cache size, block size, associativity. Advanced cache optimizations-way prediction, pipelined and non-blocking caches, multi-banked caches, critical word first, early restart approaches, hardware pre-fetching, write buffer merging. 
    Week 8: Introduction to TCMP, NoC, topology, routing, flow control, virtual channels, input buffered router micro-architecture. Input and output selection strategies, allocators and arbiter algorithms for crossbar switch. 

    BOOKS AND REFERENCES

    1. Computer Architecture - A Quantitative Approach,5th edition, John L. Hennessy, David A. Patterson. 2. Computer Systems Design and Architecture, 2nd Edition, Vincent P. Heuring 3. Computer Organization and Architecture, 6th Edition, William Stallings 4. Advanced Computer Architectures-A Design Space Approach, Dezsosima, Terence Fountain, Peter Kacsuk.

    INSTRUCTOR BIO

    Prof. John Jose is an Assistant Professor in Department of Computer Science & Engineering, Indian Institute of Technology, Guwahati. Prior to this he worked as faculty in Rajagiri School of Engineering and Technology and Viswajyothi College of Engineering and Technology, Kerala for 7 years. He completed his Ph.D degree in Department of Computer Science & Engineering, Indian Institute of Technology Madras. He had guided over 8 M.Tech thesis and is currently supervising 6 Ph.D thesis and 2 M.Tech thesis. His area of interests is in on-chip interconnection networks and cache management techniques for large multicore systems. He is the principal investigator of two sponsored R&D projects funded by DST, Govt of India. He is having active research collaboration with University of Catania-Italy, ITRI Taiwan, and BITS Pilani-Dubai Campus.

    COURSE CERTIFICATE

    • The course is free to enroll and learn from. But if you want a certificate, you have to register and write the proctored exam conducted by us in person at any of the designated exam centers.
    • The exam is optional for a fee of Rs 1000/- (Rupees one thousand only).
    • Date and Time of Exams: 29 September 2019, Morning session 9am to 12 noon; Afternoon Session 2pm to 5pm.
    • Registration url: Announcements will be made when the registration form is open for registrations.
    • The online registration form has to be filled and the certification exam fee needs to be paid. More details will be made available when the exam registration form is published. If there are any changes, it will be mentioned then.
    • Please check the form for more details on the cities where the exams will be held, the conditions you agree to when you fill the form etc.

    CRITERIA TO GET A CERTIFICATE
    • Average assignment score = 25% of average of best 6 assignments out of the total 8 assignments given in the course. 
    • Exam score = 75% of the proctored certification exam score out of 100
    • Final score = Average assignment score + Exam score

    YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75
    • If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.
    • Certificate will have your name, photograph and the score in the final exam with the breakup.It will have the logos of NPTEL and IIT Guwahati. It will be e-verifiable at nptel.ac.in/noc.
    • Only the e-certificate will be made available. Hard copies are being discontinued from July 2019 semester and will not be dispatched.

    DOWNLOAD APP

    FOLLOW US