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Swayam Central

Analog Ic Design

By Prof. Aniruddhan.S   |   IIT Madras
This course will introduce advanced concepts in analog circuit design specifically relevant to CMOS IC design. It will cover circuit noise and mismatch, their analysis, and their impact on CMOS opamp design. As prerequisites, the student is expected to have undergone a course on (a) basic circuit theory and analysis (b) signals and systems and (c) MOS analog circuits. At the end of this course, the student should be able to design and analyze several types of CMOS opamps at the transistor level.

INTENDED AUDIENCE : B.E/B.Tech,M.E/M.Tech,M.S,PhD engineering subject
PRE-REQUISITES   : UG course (or equivalent) on: Basic Electrical Circuits, Signals and Systems, Analog Circuits
INDUSTRY SUPPORT  : NILL

Learners enrolled: 602

SUMMARY

Course Status : Upcoming
Course Type : Elective
Duration : 12 weeks
Start Date : 27 Jan 2020
End Date : 17 Apr 2020
Exam Date : 26 Apr 2020
Enrollment Ends : 03 Feb 2020
Category :
  • Electrical, Electronics and Communications Engineering
  • Level : Undergraduate/Postgraduate
    This is an AICTE approved FDP course

    COURSE LAYOUT

    Week 1  Introduction to Integrated Circuits; Review of some simple MOS amplifiers
    Week 2  
    Noise in circuits; Noise analysis of common circuits
    Week 3  
    Mismatch in circuits
    Week 4  
    Introduction to negative feedback; frequency response and Bode plots
    Week 5  
    Loop gain and stability; Dominant pole compensation
    Week 6  
    Block level conceptualization of single- and two-stage opamps
    Week 7  
    Differential and common-mode analysis; Differential amplifiers
    Week 8  
    Single-stage opamp
    Week 9  
    Telescopic opamp
    Week 10 
    Folded cascode opamp
    Week 11
     Two-stage opamp
    Week 12 
    Fully differential opamps; common-mode feedback

    BOOKS AND REFERENCES

    • Design of Analog CMOS Integrated Circuits by Behzad Razavi; Tata McGraw-Hill Edition 2006 (ISBN: 0070529035).

    INSTRUCTOR BIO

    Prof. Aniruddhan.S

    IIT Madras
    Prof. S.Aniruddhan  is an assistant professor in the Integrated Circuits and Systems group of the department of Electrical Engineering at Indian Institute of Technology Madras. He works broadly in the area of Analog IC design, with specific focus on RFIC design. He obtained a B. Tech. degree in Electrical Engineering from IIT Madras in 2000, and a Ph.D. degree from the University of Washington, Seattle in 2006. Between 2006 and 2011, he worked in the RF-Analog group at Qualcomm Inc., San Diego, designing integrated circuits for Cellular RF applications.

    COURSE CERTIFICATE

    • The course is free to enroll and learn from. But if you want a certificate, you have to register and write the proctored exam conducted by us in person at any of the designated exam centres.
    • The exam is optional for a fee of Rs 1000/- (Rupees one thousand only).
    • Date and Time of Exams: 26th April 2020, Morning session 9am to 12 noon; Afternoon Session 2pm to 5pm.
    • Registration url: Announcements will be made when the registration form is open for registrations.
    • The online registration form has to be filled and the certification exam fee needs to be paid. More details will be made available when the exam registration form is published. If there are any changes, it will be mentioned then.
    • Please check the form for more details on the cities where the exams will be held, the conditions you agree to when you fill the form etc.

    CRITERIA TO GET A CERTIFICATE:
    • Average assignment score = 25% of average of best 8 assignments out of the total 12 assignments
     given in the course. 
    • Exam score = 75% of the proctored certification exam score out of 100
    • Final score = Average assignment score + Exam score

    YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75. 
    • If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.
    • Certificate will have your name, photograph and the score in the final exam with the breakup.It will have the logos of NPTEL and IIT Madras. It will be e-verifiable at nptel.ac.in/noc.
    • Only the e-certificate will be made available. Hard copies will not be dispatched.

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