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Swayam Central

Architectural Design of Digital Integrated Circuits

By Prof. Indranil Hatai   |   IIEST Shibpur
Digital arithmetic plays an important role in the design of general-purpose digital processors and of embedded systems for signal processing, graphics, and communications. In spite of a mature body of knowledge in digital arithmetic, each new generation of processors or digital systems creates new arithmetic design problems. Designers, researchers, and graduate students will find solid solutions to these problems in this course. This course explains the fundamental principles of algorithms available for performing arithmetic operations on digital computers. These include basic arithmetic operations like addition, subtraction, multiplication, and division in fixed-point and floating-point number systems as well as more complex operations such as square root extraction and evaluation of exponential, logarithmic, and trigonometric functions. The algorithms described are independent of the particular technology employed for their implementation.

INTENDED AUDIENCE : Computer Science, Electrical Engineering, Electronics & Communication Engineering 
PREREQUISITES Basic Digital Electronics Design.
INDUSTRY SUPPORT Intel, Samsung, Freescale, Texas Instruments 

Learners enrolled: 406

SUMMARY

Course Status : Upcoming
Course Type : Elective
Duration : 12 weeks
Start Date : 27 Jan 2020
End Date : 17 Apr 2020
Exam Date : 25 Apr 2020
Enrollment Ends : 03 Feb 2020
Category :
  • Electrical, Electronics and Communications Engineering
  • Level : Undergraduate/Postgraduate
    This is an AICTE approved FDP course

    COURSE LAYOUT

    Week 1    :  Efficient technique/s for Algorithm to Architecture Mapping 
    Week 2    :  Efficient technique/s for Algorithm to Architecture Mapping
    Week 3    :  Recent Trends on Adder/Subtractor Design
    Week 4    :  Recent Trends on Multiplier/Divider Design
    Week 5    :  Efficient VLSI Architectures for Various DSP blocks (FIR filter, CORDIC, FFT etc)
    Week 6    :  Efficient VLSI Architectures for Various DSP blocks (FIR filter, CORDIC, FFT etc)
    Week 7    :  Fundamentals of Efficient Design and Implementation strategies of Digital VLSI Design (Clock Tree synthesis, Timing Closure, Synthesis)
    Week 8    :  Fundamentals of Efficient Design and Implementation strategies of Digital VLSI Design (Clock Tree synthesis, Timing Closure, Synthesis)
    Week 9    :Static Timing Analysis 
    Week 10  :Clock Skew
    Week 11  :VLSI Interview FAQs
    Week 12  :Tips and tricks for Digital VLSI based IC design

    BOOKS AND REFERENCES

    1.Computer Arithmetic (B. Parhami) 
    2.Digital Arithmetic (M. D. Ercegovac and T. Lang) 
    3.Advanced Arithmetic for the Digital Computer (K. Ulrich)

    INSTRUCTOR BIO

    Prof. Indranil Hatai

    IIEST Shibpur
    Prof.Indranil Hatai received the B.E. degree in Electronics and Communication Engineering from the University of Burdwan, India, in 2004, and the M.S. degree (by research) and PhD in Microelectronics and VLSI design from the Department of Electronics and Electrical  Communication Engineering, IIT Kharagpur, India, in 2011 and 2017 respectively. He is currently working as an Assistant Professor in the School of VLSI Technology,  Indian Institute of Engineering, Science and Technology (IIEST), Shibpur. His research interest includes reconfigurable architecture of digital filters, software defined radio, and VLSI-based signal processing design. 

    COURSE CERTIFICATE

    • The course is free to enroll and learn from. But if you want a certificate, you have to register and write the proctored exam conducted by us in person at any of the designated exam centres.
    • The exam is optional for a fee of Rs 1000/- (Rupees one thousand only).
    • Date and Time of Exams: 29th March 2020, Morning session 9am to 12 noon; Afternoon Session 2pm to 5pm.
    • Registration url: Announcements will be made when the registration form is open for registrations.
    • The online registration form has to be filled and the certification exam fee needs to be paid. More details will be made available when the exam registration form is published. If there are any changes, it will be mentioned then.
    • Please check the form for more details on the cities where the exams will be held, the conditions you agree to when you fill the form etc.

    CRITERIA TO GET A CERTIFICATE:
    • Average assignment score = 25% of average of best 8 assignments out of the total 12 assignments
    given in the course.
    • Exam score = 75% of the proctored certification exam score out of 100
    • Final score = Average assignment score + Exam score

    YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75.
    • If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.
    • Certificate will have your name, photograph and the score in the final exam with the breakup.It will have the logos of NPTEL and IIT Kharagpur. It will be e-verifiable at nptel.ac.in/noc.
    • Only the e-certificate will be made available. Hard copies will not be dispatched.

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