Preeti Ranjan Panda received his B. Tech. degree in Computer Science and Engineering from the Indian Institute of Technology Madras and his M. S. and Ph.D. degrees in Information and Computer Science from the University of California at Irvine.
He is currently a Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Delhi. He has previously worked at Texas Instruments, Bangalore, India, and the Advanced Technology Group at Synopsys Inc., Mountain View, USA, and has been a visiting scholar at Stanford University.
His research interests are: Embedded Systems Design, CAD/VLSI, Post-silicon Debug/Validation, System Specification and Synthesis, Memory Architectures and Optimisations, Hardware/Software Codesign, and Low Power Design.
He is the author of two books: Memory issues in Embedded Systems-on-chip: Optimizations and Exploration (Kluwer Academic Publishers) and Power-efficient System Design (Springer). He is a recipient of an IBM Faculty Award and a Department of Science and Technology Young Scientist Award. Research works authored by Prof. Panda and his students have received several honours, including Best Paper nominations at CODES+ISSS, DATE, ASPDAC, and VLSI Design Conference, and Most downloaded paper of ACM TODAES journal.
Prof. Panda has served on the editorial boards of IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD) , ACM Transactions on Design Automation of Electronic Systems (TODAES) , IEEE Embedded Systems Letters and International Journal of Parallel Programming (IJPP), and as Technical Program co- Chair of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) and International Conference on VLSI Design and Embedded Systems (VLSI Design). He has also served on the technical program committees and chaired sessions at several conferences in the areas of Embedded Systems and Design Automation, including DAC, ICCAD, DATE, CODES+ISSS, IPDPS, ASPDAC, and EMSOFT.